The HiPerFPGA is a universal hardware platform and practically every conceivable appli­cation can or could be implemented on it. Computing models based on parallelism and partial reprogramming of the HiPerFPGA should yield massive speedups when compared to a traditional sequential microprocessor-based implementation.
 

A general block diagram of the HiPerFPGA with its inner structure and network connections

The research project will concentrate on the following application areas to validate the feasibility and relevance of using a massively parallel and distributed reprogrammable platform as an accelerator: digital signal processing (DSP) algorithms, string matching in bioinformatics, statistical problems in computational physics, cryptanalysis, nonlinear optimization methods in evolutionary computation and neural network -based peer-to-peer (P2P) resource discovery algorithm verifi­cation. The challenge is to describe the computation tasks in a hardware description language (VHDL, for example) and to perform partial reprogramming of the HiPerFPGA to maximize its performance.

• Research plan
• References